Direct Memory Access Driver Module

Overview

The Direct Memory Access (DMA) Controller is designed to service high-data-throughput peripherals operating on the SFR bus, allowing them to access data memory directly and eliminating the need for CPU-intensive management.

Features

• Multiple Independent and Independently-Programmable Channels
• Four Programmable Transfer Modes.
• Byte or Word Support for Data Transfer.
• 16-Bit Source and Destination Address Register for Each Channel, Dynamically Updated and Reloadable.
• Upper and Lower Address Limit Registers.

PIC24/dsPIC33 DMA Driver, DMA PLIB and Device Package Version Compatibility Matrix

|DMA Driver | DMA PLIB| PIC24/dsPIC devices | |:---| :---|:---| 1.0.2 | >=1.1.0 | >=5.4.0 1.0.1 | 1.1.0 | <=5.4.0 1.0.1 | <=1.0.1 | <=5.3.0

Changelog

All notable changes to this project will be documented in this file.

[1.0.8] - 2024-07-09

New Features

• CC16SCRIP-9551 :- Updated link for API reference document

[1.0.7] - 2024-04-03

Bug Fixes

• CC16SCRIP-8831 :- Trigger source name update

[1.0.6] - 2023-08-10

Bug Fixes

• CC16SCRIP-6890 :- Added Notification for dual core trigger sources

[1.0.5] - 2023-04-26

New Features

• CC16SCRIP-6233 :- Trigger source option changes for dual core device support

[1.0.4] - 2022-08-17

Bug Fixes

• CC16SCRIP-4648 :- Added warning notification for incorrect address limit

[1.0.3] - 2022-05-24

New Features

• CC16SCRIP-2045 :- Dependency module names updated in builder view

[1.0.2] - 2022-01-17

New Features

• CC16SCRIP-3026 :- Add Notification for dependent Driver/PLIB selection in UI

Bug Fixes

• CC16SCRIP-3408 :- DMA - Trigger sources sorting and Default trigger source selection

[1.0.1] - 2021-12-02

Bug Fixes

• CC16SCRIP-3048 :- DMA default Address Limit is not correct in the generated code